1. Field of the Invention
As processors have gotten cheaper, more and more digital data processing systems have appeared in which several processors operate as coprocessors. A coprocessor is a processor which cooperates with another processor to process data. Classic examples of coprocessors are floating-point units for performing floating point arithmetic and I/O processors for handling the flow of data between peripheral devices such as terminals and the system memory. The relationship between two coprocessors lies along a continuum whose ends are described by the notions tightly coupled and loosely coupled. One coprocessor is tightly coupled to another when there is a high degree of direct interaction between the coprocessors. For example, floating point units are typically tightly coupled. The processor served by the floating point unit provides the operands to the floating point unit, indicates the operation to be performed, and receives the results directly from the floating point unit. The results typically not only include the result value, but also signals indicating the status of the floating point operation. I/O processors, on the other hand, are typically loosely coupled. Communication with the processor they serve is generally through the system memory. When the processor requires the assistance of the I/O processor to output data, the processor places the output data and a description of what the I/O processor is to do with it in memory at a location known to the I/O processor and then indicates to the I/O processor that the data is in memory. The I/O processor thereupon responds to the indication by retrieving the data from memory and outputting it to the desired peripheral device. When it is finished, it puts a record of the status of the operation in memory at a location known to the processor and indicates to the processor that it has finished the memory operation. The processor then responds to the indication by reading the data at the location to determine the status of the output operation.
2. Description of the Prior Art
The coprocessor disclosed herein shares memory with a host processor. Both the host processor and the coprocessor may access the memory via a shared bus. In order to prevent interference between the processors on the bus, the processor of the present invention employs three-state drivers to drive the lines of the bus. A three-state driver can put an output line in one of three states: logic active, logic inactive, or off. The logic active and inactive states are expressed by different voltage or current levels, depending on the kind of circuitry; the off state is expressed by a high impedance, i.e., from the point of view of other devices attached to the bus, the driver is no longer attached to the bus.
A difficulty with three-state drivers is that the state of the line when the three-state driver is turned off is the last state which the driver placed on the line prior to turning off. Thus, if the driver places the line in the active state and then turns off, the line remains in the active state for awhile, even though it is no longer being driven. The problem with this situation is that another device on the bus (for example the memory) which responds to the line cannot distinguish between an active state being placed on the line by the driver and one remaining on the line after the driver has been shut off and may respond to an active state remaining on the line after the driver has been shut off in the same way that it responds to one being placed on the line by the driver. To prevent this problem, the art has typically brought a line driven by a three-state driver to an inactive state 1/2 clock cycle before turning the three-state driver off. The difficulty with this solution is of course the fact that an extra 1/2 cycle is required to turn a three-state driver off. An object of the present invention is to eliminate the need to bring a line driven by a three-state driver to an inactive state 1/2 clock cycle before turning the three-state driver off.